MIPS Assembly Language Programming

MIPS Assembly Language Programming

Einband:
Kartonierter Einband
EAN:
9780131420441
Genre:
Programming Languages
Autor:
Robert Britton
Herausgeber:
Pearson
Erscheinungsdatum:
29.05.2024

Users of this book will gain an understanding of the fundamental concepts of contemporary computer architecture, starting with a Reduced Instruction Set Computer (RISC). An understanding of computer architecture needs to begin with the basics of modern computer organization. The MIPS architecture embodies the fundamental design principles of all contemporary RISC architectures. This book provides an understanding of how the functional components of modern computers are put together and how a computer works at the machine-language level. KEY TOPICS: Well-written and clearly organized, this book covers the basics of MIPS architecture, including algorithm development, number systems, function calls, reentrant functions, memory-mapped I/O, exceptions and interrupts, and floating-point instructions. MARKET: For employees in the field of systems, systems development, systems analysis, and systems maintenance.

For freshman/sophomore-level courses in Assembly Language Programming, Introduction to Computer Organization, and Introduction to Computer Architecture. Students using this text will gain an understanding of how the functional components of modern computers are put together and how a computer works at the machine language level. MIPS architecture embodies the fundamental design principles of all contemporary RISC architectures. By incorporating this text into their courses, instructors will be able to prepare their undergraduate students to go on to upper-division computer organization courses.

Inhalt


1. The MIPS Architecture.


2. Algorithm Development in Pseudocode.


3. Number Systems.


4. PCSpim: The MIPS Simulator.


5. Efficient Algorithm Development.


6. Function Calls Using the Stack.


7. Reentrant Functions.


8. Memory Mapped I/O.


9. Exceptions and Interrupts.


10. A Pipelined Implementation.


11. Floating-Point Instructions.


Appendix A: Quick Reference.


Appendix B: ASCII Codes.


Appendix C: Integer Instruction Set.


Appendix D: Macro Instructions.


Appendix E: A Modified Trap Handler.


Appendix F: Floating-Point Instruction Set.


Index.


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