Microprocessor Architecture

This book describes the architecture of microprocessors from simple in-order short pipeline designs to out-of-order superscalars.

Autorentext
Jean-Loup Baer is Professor Emeritus of Computer Science and Engineering at the University of Washington, where he has been since 1969. Professor Baer is the author of Computer Systems Architecture and more than 100 refereed papers. He is a Guggenheim Fellow, an ACM Fellow, and an IEEE Fellow. Baer has held several editorial positions, including editor-in-chief of the Journal of VLSI and Computer Systems and editor of the IEEE Transactions on Computers, the IEEE Transactions on Parallel and Distributed Systems, and the Journal of Parallel and Distributed Computing. He has served as General Chair and Program Chair of several conferences, including ISCA and HPCA.

Zusammenfassung
This book describes microprocessor architecture from simple in-order short pipeline designs to out-of-order superscalars. The emphasis is on how things work at a black box and algorithmic level. The author provides sufficient detail at the register transfer level for readers to appreciate how design features enhance performance as well as complexity.

Inhalt
1. Introduction; 2. The basics; 3. Superscalar processors; 4. Front-end: branch prediction, instruction fetching, and register renaming; 5. Back-end: instruction scheduling, memory access instructions, and clusters; 6. The cache hierarchy; 7. Multiprocessors; 8. Multithreading and (chip) multiprocessors; 9. Current limitations and future challenges.

#	Onlineshop	Preis CHF	Versand CHF	Total CHF
1	Seller	0.00	0.00	0.00